rtl代码中加断言

2020-07-27  本文已影响0人  Poisson_Lee
`ifdef RTL_ASSERT_ON

  wire a_is_not_normal;
  wire b_is_not_normal;
  assign a_is_not_normal = ((a[30:23]=='1) || (a[30:23]==0 && a[22:0]!=0));
  assign b_is_not_normal = ((b[30:23]=='1) || (b[30:23]==0 && b[22:0]!=0));

  property mul_data_is_normal;
    @(posedge clk )
    disable iff(!rst_n)
    s_valid_i |-> !(a_is_not_normal || b_is_not_normal);
  endproperty
  assert_mul_data_is_normal :  assert property (mul_data_is_normal)
  else begin
    $error("a_data is 0x%0x, b_data is 0x%0x", a_data, b_data);
  end

`endif


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