Parameter Settings

2019-02-13  本文已影响0人  Empyrean_SoC

What’s the difference for setting don’t touch on cell, pin, net and path?

The dont touch objects can be cells, nets, pins, paths and library cells. It is a little special for pins since they are not real objects in designs. It is used to control the scanning process in optimization for purpose of debugging.

For cell and net, after don’t touch, it will not do the eco action.

For library cell, it means that all the cell instances with this library cell are dont touch.

For the pin, set to don’t touch and then fix violations will skip this pin when scanning.

For path, when the don’t touch represents fix violations, the pins on these paths will be skipped during scanning.


How to cancel don't touch setting?

xtop> set_dont_touch $pin false

xtop> set_dont_touch [get_paths -path_name Path_0] 0


How to skip ... ?

I/O Path

xtop> set_dont_touch [get_io_path_pins] 1

Sub Design

only fix sub design

xtop> set_module_dont_touch top_module true 

xtop> set_module_dont_touch {sub_module1 sub_module2} false

skip sub design

xtop> set_module_dont_touch  module_xxx

Hier Path

only fix hier path

xtop> set_hier_path_dont_touch  /  true

xtop> set_hier_path_dont_touch  {hier_path1 hier_path2} false

skip hier path

xtop> set_hier_path_dont_touch {hier_path1 hier_path2} true

startpoints / endpoints

xtop> set_dont_touch  [get_paths -end_points  $end_points_list]

xtop> set_dont_touch  [get_paths -start_points  $start_points_list]

internal or boundary paths

boundary paths

foreach sub_design $subdesign_list { set_dont_touch [get_paths -across $sub_design] }

internal paths

foreach sub_design $subdesign_list { set_dont_touch [get_paths -within $sub_design] }


How to set “lower bound” and “upper bound” as old ICE?

lower bound

xtop> set_parameter unreasonable_negative_slack  xxx

upper bound

try to use -target option in timing fix command.


How to set legalization margin, density and congestion?

Use the set_placement_constraint command to set placement constraint for given design.

xtop> set_placement_constraint -design cpu -max_displacement {150t 0} -max_congestion 0.9

For example, this command will set max displacement allowed of eco inst from its desired place to 150*track_pitch, with track_pitch being first horizontal layer routing pitch.

The max displacement allowed for original inst in the design is set to 0, which means leglizer will not move original inst of the design. Max congestion is set to 0.9, which means legalizer will not insert buffer into region with routing congestion value larger than 0.9.

xtop> set_placement_constraint -design B_CORE -max_density 0.6 -density_region {(0, 0, 30, 30)}

For design B_CORE, above command will set placement density threshold in the rect region, with density threshold as 0.6.


What’s the difference between “set_lib_per_instance” and “set_specific_lib_cells?

set_lib_per_instance  specifies that instance uses some specific library, which is usually used for library specification of variable voltage domain. It specifies the library name. However, this library must come in before the corresponding corner link. When doing eco, it will only look for a solution in the specified library.

set_specific_lib_cells  specifies that certain modules can only use certain types of library cells. It is usually used for the specification of special cells for some special modules. These special units usually have keywords in their names, which are  pecified as the library cell name pattern, which supports wildcards. When doing eco, it is only allowed to find candidates in the specified cell collection.


How to read N7/N12 abutment rules?

If the rules are given in the tech LEF, the program can directly read it.

If the rules are given using script file, please replace lib_cells with ref_cells, replace get_lib_cells with get_ref_cells, before sourcing it.


How to allow legalization on a design filled with fillers?

Use the set_removable_fillers command to set those filler cells matched with the specified patterns to be removable during ECO and optimization process. The cells are matched with reference library cell name, and those cells set as fixed or locked are not included.

Following example specifies some buffers to be removable fillers.

xtop> set_removable_fillers {FILLX2 FILLX4 DCAPX8 DCAPX12}

Set 4 cells as removable.

User can specify an empty string list to clear all the removable fillers.


How to control dynamic gain and margin?

At the beginning of the brief log there is a gain threshold, which is written according to the scenario. Use this value * 10 can be used as an automatic setup margin to see if it is appropriate.

Gain threshold = fastest buffer * coefficient(around 0.05)

Margin threshold = fastest buffer *coefficient (0.5). 

Margin = org margin + margin threshold

If the margin user has already been set, it will be set according to the user's margin.


Why not recommend dont_touch [get_paths -group ...]?

Because the path belongs to the group in the pt is not unique. For example, the default asyn path and io related to many paths may be repeated, this may lead to the missing of some path, more repair the customer does not want to. 

xtop> fix_..._violations [get_path -group ...]

It is recommended to use fix... [get_path -group] , because this is to fix the one you want to fix.


How to control the small Setup gain threshold?

Try the internal control variable: opt_gain_threshold

It controls how many setup timing each individual cell can improve when doing size down operations. This variable is used in conjunction with the legal distance to ensure that the setup gain is positive.

For example, the legal distance is set to 3, the increased route and via will consume a part of the setup gain, so it is required to get more than15ps when sizing up. This value may be set according to the actual design and scenario.

xtop> set_placement_constraint -designcpu -max_displacement {3 0}

xtop> set opt_gain_threshold 0.015

The distance of the second example of legal is set to 0, the original size, can be considered unchanged basically.

xtop> set_placement_constraint-design cpu -max_displacement {0 0}

xtop> set opt_gain_threshold 0.001


Why cannot clear the dont_touch attribute on some cells?

User tried the following commands, but find the cells with dont_touch is not changed.

xtop> set_dont_touch [get_cells xxx] 0

xtop> get_dont_touch_cells

By default, XTop will honor the setting of pt, any dont touch set in pt will be dont touch.To modify the dont_touch setting in pt data, you must use the parameter: honor_annotated_dont_touch.

xtop> set_parameter honor_annotated_dont_touch false


Why set_dont_touch on I/O path not working?

User set_dont_touch [get_io_path_pins] , but some I/O paths still have buffers inserted during the fix hold timing. Through the is_dont_touch command, you can see that those I/O is not set at all.

Reason:

Only the I/O setting on the reset side is invalid, and other I/Os have no problem. When the PT is out of data, when the logical amount of the IO cover is too large (more than 25% of the total logical number), the I/O will not be written as an I/O to the ilm file, so we are setting don't touch, there is no such IO at all.

Solution:

First, use the all_fanout -from port to get all the pin information, then set the set_dont_touch [get_pins ***] to be set separately.


====== 返回目录 ======

<<< 上一章:Reading Timing Data

>>> 下一章:Automatic ECO

上一篇下一篇

猜你喜欢

热点阅读