20151210：按照2ch-in，2ch-out，DSDout

一：<略>

二：按照2ch-in，2ch-out，DSD out，修改的audioin_deliver()的部分内容

{
       #if (I2S_CHANS_ADC != 0)
           /* Input previous L sample into L in buffer */
           /* First input (i.e. frameCount == 0) we read last ADC channel ofprevious frame.. */
           unsigned buffIndex = !readBuffNo;

       #pragma loop unroll
           {   // p_i2s_adc[0] :> sample;
                // Manual IN instruction sincecompiler generates an extra setc per IN (bug #15256)
                asm volatile("in %0,res[%1]" : "=r"(sample)  :"r"(p_i2s_adc[0]));
 
                tempsample=bitrev(sample);
                /* Note the use of readBuffNochanges based on frameCount */
                if(buffIndex)
                    samplesIn_1[0] =tempsample;//bitrev(sample); // channels 0, 2, 4.. on each line.
                else
                    samplesIn_0[0] =tempsample;//bitrev(sample);
           }
       #endif
           xscope_int(PLVALUE,tempsample);

           /* LR clock delayed by one clock, This is so MSB is output on thefalling edge of BCLK
            * after the falling edge on which LRCLK was toggled. (see I2S spec) */
           p_lrclk <: 0x80000000;/* Generate clocks LR Clock low - LEFT */

       #pragma xta endpoint "i2s_output_l"
       #if (I2S_CHANS_DAC != 0) && (NUM_USB_CHAN_OUT != 0)
       #pragma loop unroll
           /* Output "even" channel to DAC (i.e. left) */
           {
                p_i2s_dac[0] <:bitrev(samplesOut[0]);
           }
       #endif
           doI2SClocks(divide);/* Clock out the LR Clock, the DAC data and Clock inthe next sample into ADC */
 
       #if (I2S_CHANS_ADC != 0)
           /* Channels 0, 2, 4.. on each line */
       #pragma loop unroll
           {
           /* Manual IN instruction since compiler generates an extra setc per IN(bug #15256) */
                asm volatile("in %0,res[%1]" : "=r"(sample)  :"r"(p_i2s_adc[0]));
                tempsample=bitrev(sample);
                if(buffIndex)
                    samplesIn_1[1] = tempsample;//bitrev(sample);// channels 1, 3, 5.. on each line.
                else
                    samplesIn_0[1] =tempsample;//bitrev(sample); // channels 1, 3, 5.. on each line.
           }
       #endif
           xscope_int(PRVALUE,tempsample);
            p_lrclk <: 0x7FFFFFFF;/* Generateclocks LR Clock high - RIGHT */
 
       #pragma xta endpoint "i2s_output_r"
       #if (I2S_CHANS_DAC != 0) && (NUM_USB_CHAN_OUT != 0)
           /* Output "odd" channel to DAC (i.e. right) */
       #pragma loop unroll
           {
                p_i2s_dac[0] <:bitrev(samplesOut[1]);
           }
       #endif
           doI2SClocks(divide);
       }  // !dsdMode

三：进一步的修改：去掉不必要的预编译，用循环代替类似段

(1)#pragma loop unroll命令，编译器在进行编译时，遇到该命令就会对循环进行展开。

由于已经去掉循环，因此可将这一条预编译命令去掉。

(2)#pragma xtaendpoint "i2s_output_r" ，xta是另一种芯片，带ARM核，因此可去掉。

(3)用循环表示左右声道的处理，将类似的两段代码写成一段，注意用#pragma loop unroll预编译指令展开

(4)用了两个数组（samplesIn_1[],samplesIn_0[]）来存储录音数据，注意从I2S读入的是一个数组，而DoSampleTransfer中用的是另一个数组。

 {
            int i=0;
        #pragma loop unroll //预编译命令,将下面循环展开
            for(i=0;i<2;i++)    //i=0: even channel left;i=1:odd channelright.
            {
            /* Input previous Lsample into L in buffer */
            /* First input (i.e.frameCount == 0) we read last ADC channel of previous frame.. */
                unsigned buffIndex = !readBuffNo;//(frameCount< 3) ? !readBuffNo : readBuffNo;
                // p_i2s_adc[0] :>sample;
                // Manual IN instructionsince compiler generates an extra setc per IN (bug #15256)
                asm volatile("in %0,res[%1]" : "=r"(sample) : "r"(p_i2s_adc[0]));

                tempsample=bitrev(sample);
                /* Note the use ofreadBuffNo changes based on frameCount */
                if(buffIndex)0
                    samplesIn_1[i] = tempsample;//bitrev(sample);
                else
                    samplesIn_0[i] =tempsample;//bitrev(sample); 

            /* LR clock delayed byone clock, This is so MSB is output on the falling edge of BCLK
             * after the falling edge on which LRCLK wastoggled. (see I2S spec) */
                if(i==0)
                {
                   xscope_int(PLVALUE,tempsample);
                    p_lrclk <: 0x80000000;/* Generateclocks LR Clock low - LEFT */
                }
                else if(i==1)
                {
                   xscope_int(PRVALUE,tempsample);
                    p_lrclk <: 0x7FFFFFFF;/* Generate clocks LR Clock high - RIGHT */
                }
                p_i2s_dac[0] <: bitrev(samplesOut[i]);  //下一小节：第四部分修改之处。

/* Clock out the LR Clock, the DAC data and Clock in the nextsample into ADC */
                doI2SClocks(divide);
            }  //end for(i=0;i<2;i++)
        }
         {
            /* Do samples transfer */
            /* The below looks a bit odd but forces thecompiler to inline twice */
            unsigned command;
            if(readBuffNo)
                command =DoSampleTransfer(c_out, 1, underflowWord);
            else
                command = DoSampleTransfer(c_out,0, underflowWord);

            if(command)
            {
                return command;
            }
            /* Reset frame counterand flip the ADC buffer */
            frameCount = 0;
            readBuffNo = !readBuffNo;
        }

四：从ADC获取数据直接发给DAC，实现监听

将上面代码中的这一句：

​ p_i2s_dac[0] <:bitrev(samplesOut[i]);

改为：

​ p_i2s_dac[0] <: bitrev(tempsample);//即用收到的数据直接放到I2S

实现监听，但须注意的是切换到听歌状态时，不能听WAV歌曲，可以听DSD，原因是听歌状态的DAC路径被截断了。在正式项目时还需要改变成两种状态可切换。

五：连接android 华为手机

华为手机H60-l01，Android 4.4.2，(1)支持OTG，(2)安装海贝无损音乐播放器，用两个小头的USB连接后可以实现听音乐功能。