Compatibility - from Memory Cons

Take x86 as an example, it allows compiler to rearrange the order of Store and Load. 

As description in the MC, this is a type of relaxed consistency. Therefore, if we build a cpu which would support sequential consistency, x86 ins set could work on this cpu, but if we build a cpu support more relaxed consistency(S and S could be reordered etc), the program couldn't run correctly on this CPU.

This is just a glance.